Sequential Logic Design

O, for an engine to keep back all clocks

-Ben Jonson

And thus the whirligig of time brings in his revenges

-Shakespeare

Introduction

To this point, we have concentrated on circuits whose outputs are solely a function of their inputs. These are the combinational logic circuits. We are now ready to expand the discussion to circuits, such as the traffic light controller we studied in Chapter 1, whose outputs are a function of the current as well as the past sequence of inputs. Such circuits store information about the previous history of inputs: these are called storage or memory elements. The structure and behavior of the most primitive elements will be our primary topic. These are building blocks for more complex circuits with state to be introduced in the next chapter. In particular, we shall cover:

Simple circuits with memory. A primitive storage element can be constructed from a small number of gates connecting the outputs back as inputs. We will examine how to build two such memory elements: latches and flip-flops.
Use of clocks. Memory elements can replace their current state with a new state in a controlled and predictable way. A clock is a periodic signal distributed throughout a circuit that can ensure that all memory elements change state at approximately the same instant of time. Systems with a clock are called synchronous. We will examine alternative methods of providing the synchronizing clock signal to elements of the circuit.
Building more complex circuits from flip-flops. We will develop design methods for implementing clocked circuits from the various kinds of primitive building blocks introduced in this chapter.
The metastability problem. A problem often arises when two clocked circuits, synchronized by different clocks, need to communicate with one another. The output from one may be in transition when the other samples it as an input. The problem is intrinsic in com-municating systems, but we will present design techniques that can reduce its effect.
Self-timed circuits. By following special signaling conventions, some design methods allow circuits to communicate without a global synchronizing clock. The idea is to include among the outputs a signal indicating that the outputs are valid. We will describe some of the methods for building such self-timed circuits.

1. Sequential Switching Networks
2. Timing Methodologies
3. Realizing Circuits with Different Kinds of Flip-Flops
4. Metastability and Asynchronous Inputs
5. Self-Timed and Speed-Independent Circuits
Chapter Review
Exercise

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Sequential Logic Design

Introduction

Table of Contents

This file last updated on 07/14/96 at 15:33:06.randy@cs.Berkeley.edu;

This file last updated on 07/14/96 at 15:33:06.
randy@cs.Berkeley.edu;